As semiconductor technology advances, more and more device components are being placed on a single semiconductor die. This phenomenon is especially apparent in the area of memory device fabrication. A typical VLSI memory device contains many thousands, and even millions of transistors for the storage of information. The increased complexity of semiconductor memory devices has resulted in a corresponding increase in the size of each semiconductor die, and in the cost for fabricating the die. The increased cost arises, in part, from the need to reduce the number of defects in each semiconductor die. In view of the high fabrication costs, a semiconductor manufacturer must obtain maximum yield of semiconductor memory devices, and must obtain maximum yield at an early point in the product life cycle of any particular semiconductor product.
Because of the need to obtain optimum yield, memory designers have for a number of years included redundant circuitry within the memory array of the devices. The redundant circuitry can be activated to compensate for primary circuits, which are non-functional because of processing defeats. The redundant circuitry is activated by selectively destroying fusible links at predetermined locations in the device circuitry. The process of de-selecting damaged portions of the memory circuit and activating undamaged portions by destroying selective fusible links is known as laser repair. An optical alignment system is used to position the semiconductor die to be repaired at a specific location where a laser beam can be trained on a predetermined fusible link. The optical alignment system has the capability of recognizing certain highly reflective features, such as alignment keys, on a wafer with high accuracy. Once a wafer is placed on the alignment system, the alignment keys are used by the optical system to align the wafer stage to the laser beam. The alignment keys are placed at strategic locations on the wafer and in the die area such that proper alignment of the laser to the fusible links can be obtained. The alignment keys must be positioned such that the wafer can be aligned in both the vertical and horizontal directions. In addition, because semiconductor wafers have a circular geometry, a rotational correction must also be made as the stage moves to various locations on a wafer.
An alignment key is typically two strips of metal laid out perpendicular to each other in either an "L" shape, or a disjointed "T" shape. In operation, the laser repair tool scans a continuous wave laser beam across the alignment keys, integrating the photo-reflective response to determine as precisely as possible the exact location of the keys. Once the key locations are known, the fuse locations are known. After the laser repair tool aligns itself to the die, it steps to the appropriate fusible links on that die and cuts them with an intense laser pulse. If the laser repair tool fails to align itself to the die, the die is not repaired, and the entire device will remain nonfunctional.
Because of the high cost associated with memory device fabrication, it is important that a repairable die not be lost as a result of failure to properly align the laser repair tool to the repairable die. To enable precise alignment of the die to the laser repair tool, the alignment key must be highly reflective and must be readily identifiable by the optical alignment system. To be readily identifiable, the optical system must be able to precisely detect the edges of the metal strips in the alignment key. High reflectivity and precise edge detection are most readily obtained by a large alignment key having metal edges which are free from any overlying passivation layers.
As memory device manufacturing costs rise, it becomes less economically feasible to devote a large die area to the fabrication of alignment keys. Further, while providing a highly reflective surface, removing the passivation layers to expose bare metal edges in an alignment key, can provide a location where ionic contaminates can diffuse into underlying circuit components, and cause device failure. Accordingly, the alignment keys of the prior art suffer from either poor reflectivity leading to die alignment failure, or provide a conduit for ionic contaminates to diffuse into the integrated circuit.